This invention relates to radio frequency limiter circuits, and more particularly to limiters used in r.f. amplifiers.
As is known in the art, radio frequency amplifiers are used in a wide range of applications. As is also known in the art, input stages of microwave, or mm-wave, solid state receiver amplifiers most often include a small, sensitive transistor designed to receive low level signals. Such an amplifier is sometimes referred to as a Low Noise Amplifier (LNA).
As is also known in the art, such transistor is subject to damage through exposure to high levels of input signals in the receive band of the transistor. To avoid this damage, a limiter circuit is introduced in front of the low noise input stage. Desirable properties of this circuit are (1) low loss in the non-limiting state (2) good match in the non-limiting state (3) high reflection when in the limiting state (4) fast response and recovery (5) immunity to bum out (6) compatibility with the technologies used in the solid state module or MMIC.
Conventional limiters use PIN diodes. However, such diodes are not generally compatible with many GaAs MMIC fabrication processes. Another limiter uses Schottky diodes. However, Schottky diode limiters must be large enough to handle the requisite power levels. Diodes can be used in conjunction with depletion mode high electron mobility transistors (depletion mode HEMTs); however, relatively complex bias circuits must be used for proper operation.
In accordance with the invention, a limiter circuit includes a rectification circuit coupled to an input of the limiter circuit. The rectification circuit produces a voltage having a predetermined average level. The level is a function of an input signal fed to the input of the limiter circuit. A voltage divider circuit is coupled to the rectification circuit for producing an output voltage having a level proportional to the input signal. An enhancement mode field effect transistor has a gate electrode fed by the output voltage produced by the voltage divider circuit. The transistor has drain and source electrodes coupled to an output of the limiter circuit and a reference potential, respectively. A transmission line is coupled between the input of the limiter and the output of the limiter circuit. The transmission line has an electrical length nxcex4, where k is the nominal operating wavelength of the limiter circuit and n is an odd integer.
In one embodiment, the rectification circuit includes a pair of unidirectional conducting devices and a pair of capacitors. A first one of the capacitors is connected between the input of the limiter circuit and a junction. One of the unidirectional conducting devices is connected between the junction and the reference potential. The other one of the pair of unidirectional devices is connected between the junction and an input to the voltage divider circuit at a second junction. The other one of the capacitors is connected between the input of the voltage divider and the predetermined reference potential.
In one embodiment, the unidirectional devices are diodes.
In one embodiment, the unidirectional devices are diode-connected transistors.
In accordance with another feature of the invention, the rectification circuit is a voltage multiplier circuit.
The details of one or more embodiments of the invention are set forth in the accompanying drawings and the description below. Other features, objects, and advantages of the invention will be apparent from the description and drawings, and from the claims.